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Features

Features include

– High-speed, easy-to-use fiber optic network (serial 2.12 GBaud)

– 33 MHz 64-bit/32-bit compliant PCI bus, 3.3 V or 5.0 V logic levels

– 66 MHz 64-bit/32-bit compliant PCI bus, 3.3 V logic level

– Host processor does not participate in network operation

– Optional redundant operation modes

– Up to 256 nodes

– Up to 256 nodes up to 300 m to multimode fiber, up to 10 km to singlemode fiber

– Dynamic packet sizes from 4 to 64 bytes of data per packet

– Fiber-optic network transfer rates of 43 MByte/s to 170 MByte/s

– 128/256 MB bytes of SDRAM reflective memory, with optional parity checking

– Independent direct memory access (DMA) channels

– Four general-purpose network interrupts; each interrupt has 32 bits of data

– Configurable endian translation for multiple CPU architectures on the same network

– Selectable PCI PIO window sizes from 2 MB bytes to 64 MB bytes to full installed memory size

– Supported Operating Systems Supports Windows® 2000. Windows XP, Linux®, and VxWorks® operating systems.

– RoHS compliant

Comparison of PMC-5565PIORC and VMIPMC-5565

The PMC-5565PIORC combines the components of the classic VMIPMC-5565 into a single FPGA (Field Programmable Gate Array).

These components include PLX Technologies’ PCI interface device, three separate small FPGAs, a transmit FIFO and a receive FIFO.

The PMC-5565PIORC adds greater design flexibility than the legacy VMIPMC-5565 and improves performance in at least three ways.

1. the PMC-5565PIORC has improved DMA burst and PIO single read access rates over the legacy VMIPMC-5565. 2. the PMC-5565PIORC has improved DMA burst and PIO single read access rates over the legacy VMIPMC-5565.

2. The PMC-5565PIORC’s onboard SDRAM memory access bandwidth has been doubled, improving overall throughput. doubled, increasing overall throughput.

3. The PMC-5565PIORC can be field upgraded as new features are added.

The legacy VMIPMC-5565 contains a set of control registers dcs-sis.com in the PLX device and a separate set of RFM-specific control registers in the FPGA.

Since these two sets of registers are physically located in different devices, they are accessed through different memory areas.

On the other hand, the PMC-5565PIORC contains two sets of registers in the same FPGA. These two sets of registers could have been combined.

However, in order to maintain software continuity and backward compatibility, the two sets of registers are stored separately as in the classic VMIPMC-5565.

In addition, the individual bit functions within the registers (where applicable) remain compatible.

The PMC-5565PIORC does not include a second DMA engine.

As shown below, the PMC-5565PIORC has an optical transceiver and three LEDs on the front panel.

The port labeled “RX” is the receiver and the port labeled “TX” is the transmitter.The PMC-5565PIORC uses an “LC” type fiber optic cable.

Microprocessor

– The VMIVME-7740 brings the Intel Pentium III processor to VMEbus.

The VMIVME-7740 introduces the Intel Pentium III processor to the VMEbus with processor speeds up to 850 MHz. the Pentium III processor has 32-bit addressing and a 64-bit data bus.

Its superscalar architecture allows three instructions per clock cycle. Dynamic branch prediction units, separate instruction and data caches, and MMX™ technology also increase processor performance.

The Pentium III processor also offers a 256 Kbyte Advanced Transfer Cache (on-chip, full-speed L2 cache) with dual independent bus architecture dcs-sis.com for high bandwidth and performance.

This L2 cache is clocked at the same frequency as the processor, which improves performance.

Memory

– The VMIVME-7740 accepts a 144-pin SDRAM SODIMM with a maximum memory capacity of 512 Mbyte.

The maximum memory capacity is 512 Mbyte. on-board DRAM is dual-ported to the VME bus.

BIOS

– The system and video BIOS is provided by reprogrammable flash memory.

Super VGA Controller

– High Resolution

The VMIVME-7740 supports high-resolution graphics and multimedia-quality video through the Chips & Technology AGP graphics adapter.

The adapter is complemented by 4 Mbyte of internal high-bandwidth 64-bit data interface synchronous DRAM.

The graphics adapter supports screen resolutions up to 1.600 x 1.200 x 64.000 colors (single view mode).

Ethernet Controller – The VMIVME-7740 supports Ethernet LAN through dual Intel 82559 Ethernet controllers.

Supports 10BaseT and 100BaseTX options through two RJ45 connectors. Remote LAN booting is supported.

Remote Ethernet Booting – The VMIVME-7740 utilizes Lanworks Technologies, Inc. BootWare to provide the ability to remotely boot the VMIVME-7740 using NetWare, TCP/IP, or RPL network protocols.

BootWare Features:

– Support for NetWare, TCP/IP, RPL network protocols

– Unrivaled boot sector virus protection

– Detailed boot configuration screens

– Comprehensive diagnostic capabilities

– Option to disable local boot

– Dual boot option allows user to select either network or local boot

Serial Ports – The VMIVME-7740 has two 16550-compatible serial ports on the front panel. The serial channel has a 16-byte FIFO and supports baud rates up to 56 kilobytes per second.

56 kilobytes per second. Two micro-DB9 to standard DB-9 adapters (VMIC P/N 360-010050-001) are required.

Keyboard and Mouse Interface – The VMIVME-7740 is equipped with a PS/2 combo keyboard and mouse interface. A Y adapter cable is included.

Flash Memory – The VMIVME-7740 provides up to 192 Mbytes of IDE CompactFlash flash memory, accessible through the auxiliary IDE port.The VMIVME-7740 BIOS includes an option to allow the board to boot from flash memory.

16-Bit Timers – The VMIVME-7740 provides the user with three 82C54-compatible 16-bit timers (in addition to the system timer). These timers are mapped to I/O space and are fully programmable by software.

Watchdog Timer – The VMIVME-7740 provides a software programmable watchdog timer.

The watchdog timer is enabled under software control. Once the watchdog timer is enabled, the on-board software must access the timer within the specified timer period or a timeout will occur. A user jumper allows the timeout to cause a reset.

Independent of the jumper, software can enable a watchdog timeout to cause a non-maskable interrupt (NMI) or VMEbus SYSFAIL.

Functions

– 64-bit differential or high voltage digital inputs

– Each group of 32 inputs can be monitored by jumper selection:

Contact closure, voltage source, current sink, or differential signal.

– Open provides logic zero dcs-sis.com or (jumper selectable) logic one.

– Input filter options

– On-board built-in test logic

– Front panel with fault LEDs

– Front panel with fault LEDs for fault detection and isolation

– User selectable input voltage thresholds (1.25 to 66V)

RS422/RS485-compatible differential line receiver provides ± 7V noise immunity

– 8-, 16-, or 32-bit data transmission

– Dual Eurocard form factor

– High-reliability DIN-type I/O connectors

– Compatible with GE Fanuc Embedded Systems’ family of intelligent I/O controllers (901x and 906x series)

– Boot Replacement Option

– Software compatible with VMIVME-1110

Functional Features

Compatibility: Compatible with VMEbus specification. Double height form factor.

Input Connector Type: Dual 64-pin connector – DIN 41612

Input/Output Organization Eight input ports; eight bits wide. Addressable to any address within the short-circuit monitor and/or short-circuit unprivileged I/O map. Control and Status Register (CSR) addresses are independently selectable.

Addressing Scheme: Each of the eight ports can be addressed on 8-, 16-, or 32-bit boundaries. One CSR can be addressed on 8-bit boundaries. 13 jumpers provide unlimited short data I/O address mapping options.

Differential Signal Input Characteristics: Common Mode Input Voltage Range: -30 to +66 V. Common Mode Input Voltage Range: -7 to +12 V. Input Sensitivity ± 100 mV. High Input Impedance (33 kΩ).

Single-Ended Signal Input Characteristics: High input impedance (33kΩ). Threshold accuracy of 1% (typical) over the entire 66V range.

Signal Conditioning Input Filter Terminator Option: The board can be ordered with an input signal filter circuit.

For differential inputs, the circuit consists of a series resistor and capacitor connected across the signal input. For single-ended inputs, the circuit provides an input dither filter with a user-selectable time constant.

Built-in Test: The board is designed with internal self-test logic to test all active components.

Special output registers are provided to generate 16-bit data words for worst-case bit patterns to be used as health tests during real-time or off-line operation.

A special test mode bit in the CSR enables the output test register to drive a differential receiver.

The front panel fault LED illuminates at power-up and can be programmed to go out after successful completion of user-defined diagnostics.

-64 optically coupled digital inputs

-5 V to 48 VDC input range

-High isolation, 1.000 V continuous, 7.500 V pulse voltage

-Filter input options

-Dual I/O connectors

-Contact closure sensing

-Voltage or current source input options

-Positive or negative true input options

-Dual Eurocard form factor with front panel

8-bit or 16-bit data transfer

-Unprivileged or supervisory I/O access

-Highly reliable DIN-compatible input connectors

Functional Features

Board Features:

This 64-bit optically coupled digital input board is designed and optimized for the VME bus.

The VMIVME-1150 is highly isolated and provides a flexible, low cost, high noise immunity 8-byte digital input port. The functional block diagram is shown below.

Compatibility:

The VMIVME-1150 is a standard double height printed circuit board that is electrically and mechanically compatible with the VME bus.

Input Organization:

Eight input ports, each eight bits wide. The ports are organized as eight consecutive 8-bit read-only registers.

Addressing Scheme:

Each 8-bit port is individually addressable anywhere within an 8-bit or 16-bit boundary.

Short-circuit monitoring or short-circuiting anywhere within unprivileged I/O space.

Board Address:

The board address is selected by the on-board DIP switches. Runs in any available slot on the VMEbus backplane except slot 1.

VMEbus Access:

The address modifier bits are decoded to support short supervised or unprivileged short I/O access. A jumper is provided to support this option. The board is factory configured for short supervised I/O access.

VME Bus Reply:

The DTACK reply is a response to a data select (DS0 or DS1) and the decoded board address.

Board Address.

Data Transfer Type:

D8. D16

Access Time

Maximum 250 milliseconds

Data Polarity

Sorted by positive or negative true. This depends on the input assertion of the board. To assert an input, current must flow through the LED in the optocoupler.

For positive “true” boards, this current will indicate a logic “1” to the VME bus. If the board is ordered with negative true logic, the board will display a logic zero to the VMEbus when current is flowing through the LED.

Input Characteristics

Signal Conditioning:

The input can be either a voltage or current source with a voltage range of 5 to 48 V. The input can be either a voltage or current source with a voltage range of 5 to 48 V.