The A/D FIFO generates a signal that indicates when it contains

conversion data. You can read the signal state from the PC-LPM-16PnP

Status Register 1.

The output from the ADC is in two’s complement format. In unipolar

input mode (0 to 10 V or 0 to 5 V input range configuration), the data

from the ADC is interpreted as a 12-bit positive number ranging from 0

to 4,095. In bipolar input mode (±5 or± 2.5 V input range configuration), 

the data from the ADC is interpreted as a two’s

complement number ranging from -2,048 to +2047. The ADC’s output

is always sign-extended to 16 bits by board circuitry so that data values

read from the FIFO are 16 bits wide.

The ADC on the PC-LPM-16PnP includes calibration circuitry that

makes it possible to minimize zero, full-scale, and linearity errors. The

ADC goes through a self-calibration cycle under software control. To

properly use this ADC auto-calibration feature, you need an accurate

input stage that does not introduce significant offset and gain errors.

The analog input stage on the PC-LPM-16PnP maintains the required

accuracy without trimpot adjustments.