Month: September 2025

Output Data Transfer:

Data for each analog output

channel is written directly into an on-board register

location dedicated to a specific channel.  The data is

then periodically retrieved from the register, and

converted to an analog voltage which is transferred to

one of 32 output sample-and-hold buffers.

A/D Data Format (Built-in-Test Data):

Analog

inputs are first digitized, then the 12-bit digital values

(D11 to D00) are read at a single memory word location.

In two’s complement mode, the upper four bits (D15.

D14. D13. and D12) are read as the sign extension of the

12-bit digital value, otherwise they are read as logical zeros.

Built-in-Testing:

Built-in-Test logic provides the user

with the capability to test all of the active components on

the board, including the output switches. This test

scheme utilizes an on-board analog-to-digital converter

(ADC) and multiplexers, as shown in Figure 1.

Memory Testing:

This product is designed with

dual-port on-board registers that may be tested by

executing a user-defined memory test program for

additional performance verification.

System Reset:

Application of the system reset signal

via the VMEbus initializes the board into a state with all

analog outputs disconnected from the output.

FUNCTIONAL CHARACTERISTICS

VMEbus Compliance:

The analog output board is a

standard double height printed circuit board which is

compatible with the VMEbus specification (Rev. C.1).

VMEbus A16:D16

Board Address:

The physical address for the board

may be selected by on-board jumpers.  VMEbus address

lines A07 through A15 are decoded for board selection.

VMEbus Access:

Address modifier bits are

jumper-selected and decoded to support both

nonprivileged short I/O, supervisory short I/O, or both.

The board is factory-configured for supervisory short I/O.

Output Data Transfer:

Data for each analog output

channel is written directly into an on-board register

location dedicated to a specific channel.  The data is

then periodically retrieved from the register, and

converted to an analog voltage which is transferred to

one of 32 output sample-and-hold buffers.

48VDC 32 Point Positive/Negative Logic Input module, IC694MDL658. provides

32 discrete input points that operate at levels up to 60V.  Power to operate field

devices must be provided using an external supply.

The blue band on the front label indicates a low-voltage module.

These modules do not report special fault or alarm diagnostics.  Green LEDs

indicate the ON/OFF status of each input point.

These modules can be installed in any I/O slot in the RX3i system.

Installation in Hazardous Locations

• EQUIPMENT LABELED WITH REFERENCE TO CLASS I, GROUPS A, B, C & D, DIV. 2 HAZARDOUS

LOCATIONS IS SUITABLE FOR USE IN CLASS I, DIVISION 2. GROUPS A, B, C, D OR NON-HAZARDOUS

LOCATIONS ONLY

• WARNING – EXPLOSION HAZARD – SUBSTITUTION OF COMPONENTS MAY IMPAIR SUITABILITY FOR

CLASS I, DIVISION 2;

• WARNING – EXPLOSION HAZARD – WHEN IN HAZARDOUS LOCATIONS, TURN OFF POWER BEFORE

REPLACING OR WIRING MODULES; AND

• WARNING – EXPLOSION HAZARD – DO NOT DISCONNECT EQUIPMENT UNLESS POWER HAS BEEN

SWITCHED OFF OR THE AREA IS KNOWN TO BE NONHAZARDOUS.

PACSystems RX3i 32-Point Positive/Negative Logic input modules provide 32

positive or negative logic input points in four isolated groups of eight. Each group is

referenced to its own common connection.

5/12VDC (TTL) 32 Point Positive/Negative Logic Input module, IC694MDL654.

shown at left,  provides 32 discrete TTL voltage threshold input points that operate

at levels up to 15V.  A single, regulated +5V supply (current limited to approximately

150mA) is available through the I/O connectors on the front of the module.  This

supply is generated on the module and is isolated from the backplane.  Its power

input comes from the +5V logic supply on the PLC backplane.  By installing jumpers

on the I/O connector, you can choose to power the inputs from this internal supply

instead of powering them with an external user provided supply.

24VDC 32 Point Positive/Negative Logic Input module, IC694MDL655. provides

32 discrete input points that operate at levels up to 30V.  Power to operate field

devices can come from an external supply or from the module’s isolated +24 VDC output.

The board accepts a 14-bit digital output

word (shaft angle), a reference excitation voltage, and

produces a synchro or resolver output.

The board is ideally suited for computer-based systems

in which digital information is processed, such as simulators,

robotics, and other control-oriented systems. The DSC/DRC

is provided with several options and is capable of interfacing

with most standard synchro or resolver devices.

FUNCTIONAL CHARACTERISTICS

Compatibility:

VMEbus specification compatible.

Double height form factor.

Output Connector Type:

AMP no. 206584-1

Output Organization:

Two ports, 16 bits wide.

Addressable to any address within short supervisory or

short nonprivileged I/O map.

Address Modifier Codes:

Jumper selectable for short

supervisory or short nonprivileged I/O access. Factory

configured for short supervisory I/O access.

Addressing Scheme:

Two ports individually

addressable on 8- or 16-bit boundaries. Two

eight-position DIP switches provide unlimited short data

I/O address map selection.

DESCRIPTION

— The VMIVME-4905. a digital-to-synchro or resolver converter (DSC/DRC) board,

utilizes the NATEL-HSDR 2514 converter module. It

supports a wide variety of options which are supported by

configuring jumpers on the basic printed circuit board and by

installing optional parts (see the Ordering Options). The

VMIVME-4905 board, with supported Built-in-Test VMIC

hardware, features both offline and online fault detection and

isolation. The Built-in-Test features require a VMIC

quad-channel synchro-to-digital converter (SDC) board

(VMIVME-4911) or a single channel SDC board

(VMIVME-4910) and a standard synchro test backplane

(SRTbus™) installed in the P2 position of a standard VME

chassis (refer to VMIC’s Synchro/Resolver (Built-in-Test)

Subsystem Configuration Guide, Document No.